Ultrasonic probes used for ultrasonic diagnostic apparatuses and the like include an array ultrasonic probe formed from an array of a plurality of ultrasonic transducers. Recently, a two-dimensional array probe formed from a two-dimensional array of a plurality of ultrasonic transducers has appeared on the market to allow three-dimensional scanning on a diagnosis target region of an object. Such a two-dimensional array probe includes an enormous number of elements, and hence generally incorporates electronic circuitry for transmission/reception in the probe grip portion. For example, electronic circuitry in the probe incorporates, as a function, part of transmission/reception used by the diagnostic apparatus main body.
When using such a two-dimensional array probe, since the probe includes an enormous number of ultrasonic transducers (i.e., channels), the number of wirings required for transmission/reception between the ultrasonic probe and the ultrasonic diagnostic apparatus main body tends to be enormous. In order to prevent this, for example, an attempt has been made to provide electronic circuitry for generating transmission pulses in the ultrasonic probe instead of the ultrasonic diagnostic apparatus main body so as to send out reception signals to the ultrasonic diagnostic apparatus main body upon accumulating a predetermined number of reception signals within the ultrasonic probe. In addition, there have been proposed a technique of commonly connecting a plurality of ultrasonic transducers via a switch capable of changing a connection pattern and collectively connecting a plurality of transducers to the transmission/reception circuitry of the diagnostic apparatus main body, a sparse technique of improving feasibility by decreasing the number of elements to be operated to decrease the number of connecting wires or electronic circuitry size, and the like (see FIG. 10).
In addition, there have conventionally been proposed several techniques of connecting electronic circuits to respective ultrasonic transducers provided in an ultrasonic probe. Typically, the following three techniques can be presented.
(1) An FPC (flexible printed circuit) is mounted on the rear surface of each ultrasonic transducer (element), and electronic circuits (ICs) are mounted on the FPC upon extraction of signal wires from the pattern of the FPC in the lateral direction or multiple point connection is performed on the board on which ICs are mounted.
(2) Signal wires vertically run into the backing and connected to the ICs mounted on the rear and side surfaces of the backing.
(3) ICs are directly connected to the rear surface of each ultrasonic transducer by using bumps and the like and connected to wirings in the FPC and the backing from the rear surfaces of the electronic circuits.
The technique (1) described above can be implemented at a low cost because of the simplicity of the structure of an ultrasonic probe, and exhibits a high degree of freedom of ICs. This can keep the cost of development low. On the other hand, the limitation of the pattern pitch of an FPC makes it impossible to make signals from elements in the middle portion of the array run through between the through holes of elements in the end portions of the array. FIG. 8 shows a case in which five wiring patterns run between adjacent through holes.
When using the technique (1) described above, however, if, for example, the element pitch is 0.4 mm×0.4 mm and the minimum pad diameter of each through hole is 0.1 mm, the gap between the pads is 0.3 mm. If, for example, wiring is performed with a wiring pitch of 40 μm, only seven patterns can be made to run between through holes. In addition, when patterns are to be extracted in the two directions of the array in this case, wirings can be extracted from only 16 rows of transducers. With 16 rows of transducers, the diameter is 6.4 mm. That is, a sufficient diameter cannot be obtained.
As an FPC structure, a multilayer FPC can be used, in which a wiring layer is provided on an inner layer to connect the surface layer to each layer via through holes. However, a multilayer FPC requires a complicated manufacturing process and a high cost, and has its limitation when arranging a fine pattern on the inner layer. In addition, a deterioration in the flexibility of the FPC itself will make it difficult to perform routing inside the probe grip portion or limit a connection portion for an electronic circuit board to one surface. This leads to an increase in connection area between the transducer array and the electronic circuit board. In some cases, in order to solve this problem, as shown in FIG. 9, the overall array is divided into a plurality of modules, and an FPC is provided for each module so as to form a structure having the FPCs sandwiched between the modules (in the above case, if, for example, an array is constituted by two modules, 32 rows of transducers are formed). In this case, the element pitch between the modules increases as compared with the original pitch to generate side lobes. In addition, if the position accuracy between the modules is low, the delay accuracy deteriorates. This affects images. It is, in particular, very difficult to keep the surface accuracy of the acoustic emission surface good. In addition, the division into modules will increase the numbers of components and processes, resulting in an increase in cost.
According to the technique (2) described above, it is difficult and costs much to manufacture a backing member through which an enormous number of signal wires run at a small pitch in the longitudinal direction. In addition, a backing member having such a structure causes a deterioration in the convergence of waveforms because of acoustic resonance, resulting in adverse effects on images. In addition, it is difficult for a soft material like a backing material to obtain sufficient flatness even by polishing. This leads to a deterioration in connection reliability with respect to the electrodes of IC chips.
The technique (3) described above needs to form pads on the two surfaces of electronic circuitry, which is difficult to implement by a general semiconductor process. Such a structure is formed by using a semiconductor process called through-silicon via. This is a special process, and hence leads to high cost of production.
In the technique (3), electrodes may be extracted from an IC end portion by wire bonding or the like while electrodes are exposed on one surface without using through-silicon via. However, this technique requires bonding pads and wiring spaces on both an IC and a board to increase acoustically ineffective portions. This inevitably causes an increase in the outer size of a probe. In addition, in order to prevent an IC (silicon semiconductor) from producing acoustically adverse effects, it is necessary to polish the IC chip itself to a very small thickness (e.g., 100 μm or less) and perform bare chip mounting. In such a case, it is difficult to handle ICs, and it is difficult to manufacture very thin chips in the case of through-silicon via.
In addition, since it is necessary to use a dedicated IC having a circuit size corresponding to an element array, the unit cost of ICs becomes high, and it is necessary to develop a dedicated ID (ASIC) for each use of an array. This also poses a problem in terms of development cost. Furthermore, the sparse technique shown in FIG. 10 leads to partial missing of elements, and hence exerts adverse effects on a sound field and sensitivity.
An ultrasonic probe having a structure like that shown in FIGS. 11 and 12 has also been proposed. However, it is necessary to additionally execute the step of forming level differences between FPCs and provide conductive layers having different thicknesses, resulting in a complicated manufacturing method.
As described above, the conventional techniques of connecting the electronic circuits to the respective ultrasonic transducers provided in the ultrasonic probe are not sometimes satisfactory in terms of manufacturing cost and product reliability.